DUAL GATE FD-SOI TRANSISTOR

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United States of America Patent

SERIAL NO

14231459

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Abstract

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Circuit module designs that incorporate dual gate field effect transistors are implemented with fully depleted silicon-on-insulator (FD-SOI) technology. Lowering the threshold voltages of the transistors can be accomplished through dynamic secondary gate control in which a back-biasing technique is used to operate the dual gate FD-SOI transistors with enhanced switching performance. Consequently, such transistors can operate at very low core voltage supply levels, down to as low as about 0.4 V, which allows the transistors to respond quickly and to switch at higher speeds. Performance improvements are shown in circuit simulations of an inverter, an amplifier, a level shifter, and a voltage detection circuit module.

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Patent Owner(s)

Patent OwnerAddress
STMICROELECTRONICS INTERNATIONAL N VWTC SCHIPHOL AIRPORT SCHIPHOL BOULEVARD 265 1118BH SCHIPHOL AIRPORT AMSTERDAM

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Agrawal, Ankit Greater Noida, IN 21 124
Kumar, Anand Noida, IN 103 660

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