UNIVERSAL ENCAPSULATION SUBSTRATE, ENCAPSULATION STRUCTURE AND ENCAPSULATION METHOD
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United States of America Patent
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Issued Date -
Apr 30, 2015
app pub date -
Dec 23, 2011
filing date -
Dec 12, 2011
priority date (Note) -
Abandoned
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Abstract
A universal packaging substrate, comprising a first substrate (102) and a silicon interposer (103), wherein, a plurality of bumps (106) are formed between the upper surface of the first substrate (102) and the lower surface of the silicon interposer (103) and electrically connect the upper surface of the first substrate (102) and the lower surface of the silicon interposer (103), and a plurality of wire bonding pads are formed on the upper surface of the silicon interposer (103) and are electrically connected to the bumps (106) respectively via silicon through holes (105). Also disclosed are a packaging structure provided with the packaging substrate and an packaging method. The substrate is suitable for small batch integrated circuit products, providing low cost and short cycle for packaging.
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