METHOD AND APPARATUS FOR ON-THE-FLY MEMORY CHANNEL BUILT-IN-SELF-TEST
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United States of America Patent
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Issued Date -
Apr 16, 2015
app pub date -
Oct 16, 2013
filing date -
Oct 16, 2013
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Abandoned
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Abstract
The present invention discloses a memory channel bridge with a BIST module; and the memory channel bridge interfaces other channels in a SOC to access a memory module. During a DFT test, SOC memory channels and the BIST access the memory module concurrently by using an arbiter in the memory channel bridge to arbitrate the traffics from the SOC memory channels and the BIST to ensure the correctness and completeness of the whole design.
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