SEMICONDUCTOR DEVICE INCLUDING STRESS LAYER ADJACENT CHANNEL AND RELATED METHODS

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United States of America Patent

APP PUB NO 20150102410A1
SERIAL NO

14050666

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Abstract

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A method for making a semiconductor device may include forming a gate on a semiconductor layer, forming sidewall spacers adjacent the gate, and forming raised source and drain regions defining a channel in the semiconductor layer under the gate. The raised source and drain regions may be spaced apart from the gate by the sidewall spacers. The method may further include removing the sidewall spacers to expose the semiconductor layer between the raised source and drain regions and the gate, and forming a stress layer overlying the gate and the raised source and drain regions. The stress layer may contact the semiconductor layer between the raised source and drain regions and the gate.

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Patent Owner(s)

Patent OwnerAddress
GLOBALFOUNDRIES INCMAPLES CORPORATE SERVICES LIMITED PO BOX 309 UGLAND HOUSE GRAND CAYMAN KY1-1104

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Cai, Xiuyu Niskayuna, US 196 4082
LIU, QING Guilderland, US 537 5415
Xie, Ruilong Schenectady, US 1683 12538

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