METHOD FOR FORMING THROUGH WAFER VIAS IN SEMICONDUCTOR DEVICES
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United States of America Patent
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Issued Date -
Apr 9, 2015
app pub date -
Oct 7, 2013
filing date -
Oct 7, 2013
priority date (Note) -
Abandoned
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Abstract
A method for forming a through wafer via hole in a semiconductor device, wherein the semiconductor device comprises a wafer having a SiC substrate with a front side and a backside, a GaN-based layer formed on the front side of the SiC substrate, and a mask structure formed on the backside of the SiC substrate defining an etching area. The etching area is first descummed A through substrate via hole is formed by etching the etching area through the SiC substrate. The mask structure is removed and the inner surface of the through substrate via hole is cleaned. The inner surface of the through substrate via hole is then descummed A through wafer via hole is formed by etching through the GaN layer in the through substrate via hole. And lastly the inner surface of the through wafer via hole is cleaned.
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