SEMICONDUCTOR STRUCTURE AND METHOD FOR MANUFACTURING THE SAME
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United States of America Patent
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Issued Date -
Mar 26, 2015
app pub date -
May 16, 2012
filing date -
Apr 28, 2012
priority date (Note) -
Abandoned
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Abstract
The present invention provides a method for manufacturing a semiconductor structure, which comprises following steps: providing an SOI substrate, onto which a heavily doped buried layer and a surface active layer are formed; forming a gate stack and sidewall spacers on the substrate; forming an opening at one side of the gate stack, wherein the opening penetrates through the surface active layer, the heavily doped buried layer and reaches into a silicon film located on an insulating buried layer of the SOI substrate; filling the opening to form a plug; forming source/drain regions, wherein the source region overlaps with the heavily doped buried layer, and a part of the drain region is located in the plug. Accordingly, the present invention further provides a semiconductor structure. In the present invention, the heavily doped buried layer is favorable for reducing width of depletion layers at source/drain regions and suppressing short-channel effects. The heavily doped buried layer overlaps with the source region, which thence forms a heavily doped pn junction favorable for suppressing floating body effects of SOI MOS devices, thereby improving performance of semiconductor devices. Besides, no body contact is needed in the present invention, thus device area and manufacturing cost are saved.
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