POWER SEMICONDUCTOR DEVICE PACKAGE AND FABRICATION METHOD
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United States of America Patent
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Issued Date -
Mar 19, 2015
app pub date -
Sep 17, 2013
filing date -
Sep 17, 2013
priority date (Note) -
Abandoned
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Abstract
A power semiconductor device package includes a conductive assembly including a connecting structure and a semiconductor die having an aperture formed therethrough, the aperture being sized and configured to spacedly receive the connecting structure. In an alternative embodiment, a power semiconductor device package includes a conductive assembly including a connecting structure and a pair of semiconductor die disposed on either side of the connecting structure in spaced relationship thereto.
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