REDUCING LATENCY ASSOCIATED WITH TIMESTAMPS
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United States of America Patent
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Issued Date -
Mar 12, 2015
app pub date -
Sep 11, 2013
filing date -
Aug 29, 2008
priority date (Note) -
Abandoned
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Abstract
A system and method are provided for reducing a latency associated with timestamps in a multi-core, multi threaded processor. A processor capable of simultaneously processing a plurality of threads is provided. The processor includes a plurality of cores, a plurality of network interfaces for network communication, and a timer circuit for reducing a latency associated with timestamps used for synchronization of the network communication utilizing a precision time protocol.
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