MEMORY DEVICE COMPRISING TILES WITH SHARED READ AND WRITE CIRCUITS
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United States of America Patent
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app pub date -
Feb 21, 2014
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Sep 6, 2013
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Abandoned
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Abstract
A memory device comprising a plurality of simultaneously programmable banks, each bank comprising a plurality of memory tiles, each memory tile divided into a plurality of sub-tiles and a multi-level column and a multi-level row select for the plurality of memory tiles.
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