TIMING ANALYSIS METHOD FOR NON-STANDARD CELL CIRCUIT AND ASSOCIATED MACHINE READABLE MEDIUM
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United States of America Patent
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Issued Date -
Mar 5, 2015
app pub date -
Aug 3, 2014
filing date -
Sep 5, 2013
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Abandoned
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Abstract
A timing analysis method applied for a non-standard cell circuit, includes: identifying at least a first register and a second register from the circuit; calculating at least one path delay of at least one path between the first register and the second register; calculating a first register clock delay from a first clock source to a first register clock input terminal of the first register; calculating a second register clock delay from a second clock source to a second register clock input terminal of the second register; and determining whether timing violation takes place in respect of the second register according to the path delay, the first register clock delay, the second register clock delay, and a first register delay of the first register.
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