CLOCK GENERATOR CIRCUIT WITH AUTOMATIC SLEEP MODE
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United States of America Patent
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Issued Date -
Mar 5, 2015
app pub date -
Sep 4, 2013
filing date -
Sep 4, 2013
priority date (Note) -
Abandoned
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Abstract
A clock generator circuit for an integrated circuit (IC) component (e.g., a microcontroller unit) is disclosed that provides an automatic sleep mode for modules of the IC component. In some implementations, the clock generator circuit provides a simplified user interface and low power consumption by implementing one sleep mode level and allowing modules in the IC to start and stop internal clocks dynamically on demand. In active mode, the power consumption can be reduced to a minimum by turning off clocks for unused modules.
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