MULTI-CORE FUSE DECOMPRESSION MECHANISM

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United States of America Patent

APP PUB NO 20150058563A1
SERIAL NO

13972358

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Abstract

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An apparatus is contemplated for storing and decompressing configuration data in a multi-core microprocessor. The apparatus includes a shared fuse array and a plurality of microprocessor cores. The shared fuse array is disposed on a die and comprises a plurality of semiconductor fuses programmed with compressed configuration data. The plurality of microprocessor cores is also disposed on the die, where each of the plurality of microprocessor cores is coupled to the shared fuse array and is configured to access all of the compressed configuration data during power-up/reset, for initialization of elements within the each of the plurality of cores. The each of the plurality of cores have a reset controller that is configured to decompress the all of the compressed configuration data, and to distribute decompressed configuration data to initialize the elements.

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Patent Owner(s)

Patent OwnerAddress
VIA TECHNOLOGIES INC8F 533 ZHONGZHENG RD XINDIAN DIST NEW TAIPEI CITY 231

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Henry, G Glenn Austin, US 410 6997
Jain, Dinesh K Austin, US 48 579

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