MULTI-CORE MICROPROCESSOR CONFIGURATION DATA COMPRESSION AND DECOMPRESSION SYSTEM

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United States of America Patent

APP PUB NO 20150055427A1
SERIAL NO

13972725

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Abstract

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An apparatus has a fuse array, a device programmer, and a plurality of cores. The fuse array is disposed on a die, where the fuse array comprises a plurality of semiconductor fuses. The device programmer is coupled to the fuse array and is configured to access the configuration data, to compress the configuration data to yield compressed configuration data, and to program the fuse array with the compressed configuration data. The plurality of cores is disposed separately on the die and is coupled to the fuse array, where each of the plurality of cores accesses and decompresses all of the compressed configuration data upon power-up/reset, for initialization of elements within the each of the plurality of cores.

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VIA TECHNOLOGIES INC8F 535 CHUNG-CHENG ROAD HSIN-TIEN TAIPEI 231

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  • 2013 Application Filing Year
  • G11C Class
  • 3958 Applications Filed
  • 3772 Patents Issued To-Date
  • 95.31 % Issued To-Date
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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Henry, G Glenn Austin, US 410 6997
Jain, Dinesh K Austin, US 48 579

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