MULTI-CORE MICROPROCESSOR CONFIGURATION DATA COMPRESSION AND DECOMPRESSION SYSTEM
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
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N/A
Issued Date -
Feb 26, 2015
app pub date -
Aug 21, 2013
filing date -
Aug 21, 2013
priority date (Note) -
Abandoned
status (Latency Note)
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Abstract
An apparatus has a fuse array, a device programmer, and a plurality of cores. The fuse array is disposed on a die, where the fuse array comprises a plurality of semiconductor fuses. The device programmer is coupled to the fuse array and is configured to access the configuration data, to compress the configuration data to yield compressed configuration data, and to program the fuse array with the compressed configuration data. The plurality of cores is disposed separately on the die and is coupled to the fuse array, where each of the plurality of cores accesses and decompresses all of the compressed configuration data upon power-up/reset, for initialization of elements within the each of the plurality of cores.
First Claim
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- 15 United States
- 10 France
- 8 Japan
- 7 China
- 5 Korea
- 2 Other
Patent Owner(s)
Patent Owner | Address | |
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VIA TECHNOLOGIES INC | 8F 535 CHUNG-CHENG ROAD HSIN-TIEN TAIPEI 231 |
International Classification(s)

- 2013 Application Filing Year
- G11C Class
- 3958 Applications Filed
- 3772 Patents Issued To-Date
- 95.31 % Issued To-Date
Inventor(s)
Inventor Name | Address | # of filed Patents | Total Citations |
---|---|---|---|
Henry, G Glenn | Austin, US | 410 | 6997 |
# of filed Patents : 410 Total Citations : 6997 | |||
Jain, Dinesh K | Austin, US | 48 | 579 |
# of filed Patents : 48 Total Citations : 579 |
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- 0 Citation Count
- G11C Class
- 0 % this patent is cited more than
- 10 Age
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