CMOS COMPATIBLE WAFER BONDING LAYER AND PROCESS

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United States of America Patent

APP PUB NO 20150048509A1
SERIAL NO

14459329

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Abstract

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A wafer bonding layer and a process for using the same for bonding wafers are presented. The wafer bonding process includes providing a first wafer, providing a second type wafer and providing a water bonding layer. The wafer bonding layer is provided separately on a contact surface layer of the first or second wafer as part of a CMOS compatible processing recipe.

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Patent Owner(s)

Patent OwnerAddress
GLOBALFOUNDRIES SINGAPORE PTE LTD60 WOODLANDS INDUSTRIAL PARK D STREET 2 SINGAPORE 738406

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
KUMAR, Rakesh Singapore, SG 405 12380
LOW, Kia Hwee Samuel Singapore, SG 1 4
NAGARAJAN, Ranganathan Singapore, SG 25 853
TAN, Fu Chuen Singapore, SG 1 4
TIAN, Jingze Singapore, SG 4 74
WU, Jiaqi Singapore, SG 29 226
YELEHANKA, Pradeep Ramachandramurthy Singapore, SG 21 344
YIK, Chun Hoe Singapore, SG 2 6

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