METHOD FOR FABRICATING TRENCH TYPE TRANSISTOR

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United States of America Patent

SERIAL NO

14488270

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Abstract

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An epitaxial layer is formed on the semiconductor substrate. A nitride doping region is then formed at a surface of the epitaxial layer. A hard mask layer is formed on the epitaxial layer. The hard mask layer comprises at least an opening. Through the opening, agate trench is etched into the epitaxial layer. A gate is formed within the gate trench. The hard mask layer is removed such that the gate protrudes from the surface of the epitaxial layer. An ion well is formed within the epitaxial layer. A source doping region is formed within the ion well. An upper portion of the gate that protrudes from the surface of the epitaxial layer is selectively oxidized to thereby form an oxide capping layer. Using the oxide capping layer as an etching hard mask, the epitaxial layer is self-aligned etched to thereby form a contact hole.

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Patent Owner(s)

Patent OwnerAddress
ANPEC ELECTRONICS CORPORATIONHSINCHU

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Lin, Yung-Fa Hsinchu City, TW 79 629

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