SEMICONDUCTOR DEVICE AND METHOD OF EVALUATING SEMICONDUCTOR DEVICE
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United States of America Patent
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Issued Date -
Jan 22, 2015
app pub date -
Jun 17, 2014
filing date -
Jul 16, 2013
priority date (Note) -
Abandoned
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Abstract
A semiconductor device includes a plurality of memory cell array units and a test circuit unit. The test circuit unit includes a test data generating unit configured to generate a test data piece per test cycle including a writing period and a retrieving period; an expected value register configured to output the test data piece as an expected value data piece; a memory cell driving unit configured to supply a writing driving signal during the writing period, and a retrieving driving signal during the retrieving period; a data relay switching unit configured to supply the test data piece during the writing period, and to output retrieved data piece during the retrieving period; and a determining unit configured to determine whether the retrieved data piece output from the data relay switching unit matches the expected value data piece, and to generate a test result signal indicating a determination result.
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