CACHE MEMORY SYSTEM AND METHOD OF OPERATING THE SAME
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United States of America Patent
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Issued Date -
Jan 22, 2015
app pub date -
Mar 27, 2014
filing date -
Jul 17, 2013
priority date (Note) -
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status (Latency Note)
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Abstract
A cache memory system and a method of operating the cache memory system are provided. The cache memory system includes: an address buffer for receiving address bits including a cache address and a tag address from the outside or externally; a cache memory including a memory array, the cache memory outputting, from a row of the memory array which the cache address designates, a plurality of pieces of tag data and a plurality of pieces of cache data corresponding to the plurality of pieces of tag data; and a register configured to temporarily store a data set including the plurality of pieces of cache data output from the cache memory.
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Patent Citation Ranking
- 1 Citation Count
- G06F Class
- 8.54 % this patent is cited more than
- 10 Age