MAPPING OF RANDOM DEFECTS IN A MEMORY DEVICE
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United States of America Patent
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app pub date -
Oct 2, 2014
filing date -
Jul 1, 2011
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Abandoned
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Abstract
A memory device includes a memory array with random defective memory cells. The memory array is organized into rows and columns with a row and column identifying a memory location of a memory cell of the memory array. The memory device includes a row address device and a column address device and is operative to use a grouping of either the row or the column addresses to manage the random defective memory cells by mapping the memory location of a defective memory cell to an alternate memory location.
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