METHOD FOR FABRICATING A SEMICONDUCTOR DEVICE

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United States of America Patent

APP PUB NO 20150014824A1
SERIAL NO

14364900

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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The present invention relates to a method for fabricating a substrate for a semiconductor device comprising an interface region between a first layer and a second layer having different electrical properties and an exposed surface, wherein at least the second layer includes defects and/or dislocations, the method comprising the steps of: a) removing material at one or more locations of the defects and/or dislocations, thereby forming pits, wherein the pits intersect the interface region, and b) passivating the pits. The invention also relates to a corresponding semiconductor device structure.

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Patent Owner(s)

Patent OwnerAddress
SOITECFRENCH BOERNING BERNIN ISERE

International Classification(s)

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  • 2011 Application Filing Year
  • H01L Class
  • 19146 Applications Filed
  • 15997 Patents Issued To-Date
  • 83.56 % Issued To-Date
Click to zoom InYear of Issuance% of Matters IssuedCumulative IssuancesYearly Issuances20112012201320142015201620172018201920202021202220230255075100

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Kononchuk, Oleg Grenoble, FR 89 317

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  • 1 Citation Count
  • H01L Class
  • 10.46 % this patent is cited more than
  • 10 Age
Citation count rangeNumber of patents cited in rangeNumber of patents cited in various citation count ranges1377800619237183722181459473474314501 - 1011 - 2021 - 3031 - 4041 - 5051 - 6061 - 7071 - 8081 - 9091 - 100100 +05001000150020002500300035004000450050005500600065007000750080008500

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