INPUT CONFIGURATION FOR ANALOG TO DIGITAL CONVERTER
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United States of America Patent
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Issued Date -
Jan 8, 2015
app pub date -
Jul 18, 2014
filing date -
Sep 28, 2009
priority date (Note) -
Abandoned
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Abstract
A circuit comprising an input, two or more sampling capacitors, means for connecting each sampling capacitor to said input, means for discharging the sampling capacitors to a given voltage in a reset phase, means to use the voltage across the sampling capacitor for further processing in a hold phase, operating the two sampling capacitors in anti-phase such that the reset phase and sampling phase of one channel are performed in the time period the other channel is in hold phase.
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