SEMICONDUCTOR MEMORY DEVICE AND OPERATION METHOD THEREOF
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United States of America Patent
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Issued Date -
Dec 18, 2014
app pub date -
Dec 13, 2013
filing date -
Jun 12, 2013
priority date (Note) -
Abandoned
status (Latency Note)
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Abstract
A semiconductor memory device includes a memory cell suitable for having a predetermined cell state based on a data stored therein, a control signal generation unit suitable for generating a control signal for changing the cell state of the memory cell during a reading operation, an information storage unit suitable for storing a variation status information of the control signal to which a moment when the cell state of the memory cell changes is reflected, and an output unit suitable for outputting the variation status information of the control signal stored in the information storage unit as a signal corresponding to the data stored in the memory cell.
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