Multi-processor computer architecture incorporating distributed multi-ported common memory modules
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United States of America Patent
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Aug 11, 2020
Grant Date -
Dec 4, 2014
app pub date -
May 28, 2013
filing date -
May 28, 2013
priority date (Note) -
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Abstract
A multi-processor computer architecture incorporating distributed multi-ported common memory modules wherein each of the memory modules comprises a control block functioning as a cross-bar router in conjunction with one or more associated memory banks or other data storage devices. Each memory module has multiple I/O ports and the ability to relay requests to other memory modules if the desired memory location is not found on the first module. A computer system in accordance with the invention may comprise memory module cards along with processor cards interconnected using a baseboard or backplane having a toroidal interconnect architecture between the cards.
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