Hybrid plasma-semiconductor transistors, logic devices and arrays
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United States of America Patent
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Feb 16, 2016
Grant Date -
Nov 20, 2014
app pub date -
Aug 5, 2014
filing date -
Jul 19, 2010
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Abstract
A hybrid plasma semiconductor device has a thin and flexible semiconductor base layer. An emitter region is diffused into the base layer forming a pn-junction. An insulator layer is upon one side the base layer and emitter region. Base and emitter electrodes are isolated from each other by the insulator layer and electrically contact the base layer and emitter region through the insulator layer. A thin and flexible collector layer is upon an opposite side of the base layer. A microcavity is formed in the collector layer and is aligned with the emitter region. Collector electrodes are arranged to sustain a microplasma within the microcavity with application of voltage to the collector electrodes. A depth of the emitter region and a thickness of the base layer are set to define a predetermined thin portion of the base layer as a base region between the emitter region and the microcavity. Microplasma generated in the microcavity serves as a collector. Logic devices are provided in multiple sub collector and sub emitter microplasma devices formed in thin and flexible or not flexible semiconductor materials.
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