SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
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United States of America Patent
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app pub date -
Jul 9, 2014
filing date -
Feb 2, 2011
priority date (Note) -
Abandoned
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Abstract
Such a device is disclosed that includes: redundancy circuits for replacing defective memory cells included in a memory cell array; an electrical fuse circuit that stores addresses of the defective memory cells; a data determination circuit that generates a determination signal by determining whether test data read from the memory cell array is correct or incorrect; and an analysis circuit that supplies, in a first operation mode, the electrical fuse circuit with an address signal supplied when the determination signal is activated, and supplies, in a second operation mode, the electrical fuse circuit with an address signal supplied when a data mask signal supplied from outside is activated irrespective of the determination signal.
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