HETEROGENEOUS INTERGRATION OF GROUP III-V OR II-VI MATERIALS WITH SILICON OR GERMANIUM
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United States of America Patent
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Issued Date -
Oct 9, 2014
app pub date -
Apr 4, 2012
filing date -
Apr 6, 2011
priority date (Note) -
Abandoned
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Abstract
Substrates for an electronic circuit and device manufacturing methods are disclosed. According to an embodiment, the substrate comprises: a silicon or germanium wafer impregnated with impurities that form one or more deep energy levels within the band gap of the material forming the wafer, wherein at least one of said deep energy levels is positioned at least 0.3 eV away from the conduction band if the level is a donor level or at least 0.3 eV away from the valence band if the level is an acceptor level; and a device layer formed on a surface of said wafer, said device layer comprising electronically functional components formed in a layer of Periodic Table Group III-V or II-VI material. The wafer may be formed from Cz silicon or Cz germanium, for example.
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