SYSTEM AND METHOD FOR FILTRATION OF ERROR REPORTS RESPECTIVE OF STATIC AND QUASI-STATIC SIGNALS WITHIN AN INTEGRATED CIRCUIT DESIGN
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United States of America Patent
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Issued Date -
Sep 18, 2014
app pub date -
Apr 29, 2013
filing date -
Mar 15, 2013
priority date (Note) -
Abandoned
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Abstract
A system and method identify potentially static and/or quasi-static signals within an integrated circuit (IC), or portion thereof. Static and quasi-static signals may be identified in a design description of the IC by any one or more of: (1) a fan-out size exceeding some threshold, (2) a toggle frequency in a simulation trace that is below some threshold, and (3) a signal name that appears in a list accessed from the memory. Identification of static and quasi-static signals is performed, typically, as part of a verification process in order to flag cases where the verification system would otherwise indicate an error (e.g., at a clock domain crossing). Identifying a signal of the IC as being static or quasi-static improves the quality of results of verification and makes it easier for a prospective user to concentrate on actual rather than spurious issues reported during verification.
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