Importance

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Abstract

Embodiments of the present disclosure may provide a dynamic latch circuit with increased speed and that can perform comparisons on low input signals. The dynamic latch circuit may include a first input transistor receiving a first input signal and a second input transistor receiving a second input signal. A cross coupled inverters may be included to provide a first and second output signals based on the sampled input signals from the first and second input transistors. A reset circuit may be included to reset the first and second outputs to a reference voltage. The latch circuit may include an impedance controller coupled in parallel with the first and second input transistors.

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First Claim