METHOD FOR FABRICATING POWER SEMICONDUCTOR DEVICE
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United States of America Patent
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Issued Date -
Jul 31, 2014
app pub date -
Mar 4, 2013
filing date -
Jan 25, 2013
priority date (Note) -
Abandoned
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Abstract
A method for fabricating a power semiconductor device is disclosed. A substrate having thereon a plurality of die regions and scribe lanes is provided. A first epitaxial layer is formed on the substrate. A hard mask is formed on the first epitaxial layer. A trench is etched into the first epitaxial layer through an opening in the hard mask. The opening and the trench both traverse the die regions and scribe lanes in their longitudinal direction. The hard mask is then removed. A second epitaxial layer is formed in the trench. After polishing the second epitaxial layer, a third epitaxial layer is formed to cover the first and second epitaxial layers.
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