METHOD FOR REDUCING CHARGE IN CRITICAL DIMENSION-SCANNING ELECTRON MICROSCOPE METROLOGY
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United States of America Patent
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Issued Date -
Jul 24, 2014
app pub date -
Jan 17, 2014
filing date -
Jan 18, 2013
priority date (Note) -
Abandoned
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Abstract
Methods and compositions are provided for reducing or eliminating charge buildup during scanning electron microscopy (SEM) metrology of a critical dimension (CD) in a structure produced by lithography. An under layer is utilized that comprises silicon in the construction of the structure. When the lithography structure comprising the silicon-comprising under layer is scanned for CDs using SEM, the under layer reduces or eliminates charge buildup during SEM metrological observations.
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