SELF-ALIGNED VERTICAL NONVOLATILE SEMICONDUCTOR MEMORY DEVICE

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United States of America Patent

APP PUB NO 20140167134A1
SERIAL NO

13514032

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Abstract

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The present invention belongs to the technical field of semiconductor memory devices and specifically relates to a self-aligned vertical nonvolatile semiconductor memory device, Including: a semiconductor substrate, a drain region of a first doping type, two source regions of a second doping type, a stacked gate used to capture electrons; wherein the drain region, the two source regions and the stacked gate form two tunneling field effect transistors (TFETs) sharing one gate and one drain, the drain region current of each of the TFET is affected by the quantity and distribution of the charges in the stacked gate used to capture electrons, the drain is buried in the semiconductor substrate, the source regions above the drain region are separated from the drain through a channel and separated form each other through a region of the first doping type. The semiconductor memory device of the present invention features small unit area and simple manufacturing process. The memory chip using the present invention is of low manufacturing cost and high storage density.

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Patent Owner(s)

Patent OwnerAddress
FUDAN UNIVERSITYSHANGHAI

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Lin, Xi Shanghai, CN 45 109
Sun, Qingqing Shanghai, CN 42 238
Wang, Pengfei Shanghai, CN 172 398
Zhang, Wei Shanghai, CN 2625 19909

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