METHODS AND SYSTEMS FOR POLLING MEMORY OUTSIDE A PROCESSOR THREAD
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United States of America Patent
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app pub date -
Nov 7, 2012
filing date -
Nov 7, 2012
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Abstract
A system and method of monitoring a memory address is disclosed which may replace a polling operation on a memory by determining a memory address to monitor, notifying a cache controller of the memory address, and cause execution on a polling thread to wait. The cache controller may then monitor the memory address and notify the processor to resume execution of the thread. While the processor is waiting to be notified, it may enter a power save state or allow more time to be allocated to other threads being executed.
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