LOW POWER LATCHING CIRCUITS
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United States of America Patent
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Issued Date -
May 8, 2014
app pub date -
Nov 5, 2012
filing date -
Nov 5, 2012
priority date (Note) -
Abandoned
status (Latency Note)
Importance
Abstract
A latching circuit has an input for receiving the data value, an output for outputting a value indicative of the data value, a clock signal input for receiving a clock signal; and a pass gate. A feedback loop has two switching circuits arranged in parallel between two inverting devices, a first of the two switching circuits is configured to be off and not conduct in response to a control signal having a predetermined control value and a second of the two switching circuits is configured to be on and conduct in response to the control signal having the predetermined control value. A control signal controlling the two switching circuits is linked such that the switching devices switch their conduction status and the access control device act together to update the data value within the feedback loop.
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