SEMICONDUCTOR DEVICE WITH REDUCED MILLER CAPACITANCE AND FABRICATION METHOD THEREOF
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United States of America Patent
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Issued Date -
May 8, 2014
app pub date -
Dec 18, 2012
filing date -
Nov 8, 2012
priority date (Note) -
Abandoned
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Abstract
A semiconductor transistor device includes an epitaxial layer grown on a semiconductor substrate; an ion well with a junction depth in the epitaxial layer; a gate trench with a depth shallower than the junction depth in the ion well; a recess at the bottom of the gate trench; a gate oxide layer at surface of the gate trench and in the recess to form a protruding tip structure; a gate in the gate trench; and a drain extension region between the gate trench and the epitaxial layer.
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