SEMICONDUCTOR DEVICE AND ASSOCIATED METHOD FOR MANUFACTURING
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United States of America Patent
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Issued Date -
May 1, 2014
app pub date -
Oct 31, 2013
filing date -
Oct 31, 2012
priority date (Note) -
Abandoned
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Abstract
A semiconductor device having a trench-gate MOSFET and a vertical JFET formed in a semiconductor layer. In the semiconductor device, a gate region of the vertical JFET may be electrically coupled to a source region of the trench-gate MOSFET, and a drain region of the vertical JFET and a drain region of the trench-gate MOSFET may share a common region in the semiconductor layer.
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