Temperature Controlled Structured ASIC Manufactured on a 28 NM CMOS Process Lithographic Node
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United States of America Patent
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Issued Date -
Apr 17, 2014
app pub date -
Oct 11, 2012
filing date -
Oct 11, 2012
priority date (Note) -
Abandoned
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Abstract
A temperature control for a Structured ASIC chip, manufactured using a CMOS process is shown. A circuit employing temperature feedback using a microprocessor and active heating elements, that in a preferred embodiment uses decoupling cell capacitors, is employed to actively heat a die when the temperature of the die drops below a predetermined minimum temperature, in order to achieve timing closure in the chip.
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