Semiconductor device and method of preventing latch-up in a charge pump circuit

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United States of America Patent

PATENT NO 9379103
APP PUB NO 20140103415A1
SERIAL NO

14027043

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Abstract

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A charge pump circuit includes a substrate and first well region formed in the substrate. A first transistor includes first and second conduction regions disposed in the first well region. A second well region is formed in the substrate. A third well region is formed within the second well region. A second transistor includes first and second conduction regions disposed in the third well region. The second well region and third well region are coupled to a common terminal. The common terminal receives a local potential and the first well region and second well region are commonly maintained at the local potential. The first transistor and second transistor operate within the charge pump cell. A plurality of charge pump cells can be cascaded together with an output of a first charge pump cell coupled to an input of a second charge pump cell.

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Patent Owner(s)

Patent OwnerAddress
JPMORGAN CHASE BANK N A AS SUCCESSOR AGENTP O BOX 6026 IL1-1145/54/63 CHICAGO IL 60680-6026

International Classification(s)

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Aebischer, Daniel Marin-Epagnier, CH 6 27
Chevroulet, Michel Neuchatel, CH 6 78

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