METHOD TO MITIGATE THROUGH-SILICON VIA-INDUCED SUBSTRATE NOISE
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United States of America Patent
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Issued Date -
Mar 13, 2014
app pub date -
Mar 14, 2012
filing date -
Mar 14, 2011
priority date (Note) -
Abandoned
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Abstract
A semiconductor manufacture includes a first semiconductor including a substrate die having a first surface and having a second surface upon which integrated circuitry is disposed; a second semiconductor die; a through-silicon via (TSV) extending through the first semiconductor die and electrically connected to the second semiconductor die; and at least one ground plug including an electrically conductive material, positioned proximally to the TSV and extending into the substrate of the first semiconductor die from one of the first surface or the second surface.
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