Shift Register Unit, Shift Register And Display Apparatus
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United States of America Patent
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Issued Date -
Mar 6, 2014
app pub date -
Dec 14, 2012
filing date -
Jul 30, 2012
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Abstract
A shift register unit, shift register and display apparatus, for addressing the issue that the leakage current of the depletion TFT affects the shift register. The shift register unit includes: a first output control module (51); a second output control module (52); a staged output module (53), being connected to a pull-up node (PU), a pull-down node (PD), a carry signal output terminal (CA(n)) and a driving signal output terminal (OUT(n)) respectively, for maintaining the driving signal at a high level during an evaluation phase and maintaining the same at a low level during a resetting phase and a pre-charging phase as well as during a non-operation phase by outputting the carrying signal and the driving signal in a staged mode; and a pull-up node level maintaining capacitor (C1), with one terminal connected to the first low level output terminal and the other terminal connected to the source of a first Thin Film Transistor (T1) comprised in the first output control module (51), for maintaining the pull-up node (PU) at a high level by the first output control module (51) during the evaluation phase, so that to maintain the driving signal at a high level.
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