METHODS OF MAKING COMPLIANT SEMICONDUCTOR CHIP PACKAGES
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United States of America Patent
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Issued Date -
Feb 13, 2014
app pub date -
Sep 24, 2013
filing date -
Oct 31, 1995
priority date (Note) -
Abandoned
status (Latency Note)
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Abstract
A semiconductor chip package is fabricated including providing a compliant layer over a contact bearing face of a semiconductor chip, with a bottom surface of the compliant layer adjacent that chip face, a top surface facing away from the bottom surface, and at least one sloping surface extending between the top and bottom surfaces. Bond ribbons can be formed atop the compliant layer, each bond ribbon electrically coupling one of the contacts with an associated conductive terminal at the top surface of the compliant layer. A bond ribbon can include a strip extending along the sloping surface. The strip may have a substantially constant thickness in a direction away from the sloping surface.
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