Low Stress Package For an Integrated Circuit

Number of patents in Portfolio can not be more than 2000

United States of America Patent

SERIAL NO

13952587

Stats

ATTORNEY / AGENT: (SPONSORED)

Importance

Loading Importance Indicators... loading....

Abstract

See full text

A package that electrically connects an integrated circuit to a printed circuit board includes a frame and a package body that encases a portion of the frame and the integrated circuit. The frame includes a mounting region that is connected to the printed circuit board, and a cantilevering region that cantilevers away from the mounting region. The cantilevering region retains the integrated circuit in a flexible fashion.

Loading the Abstract Image... loading....

First Claim

See full text

Family

Loading Family data... loading....

Patent Owner(s)

Patent OwnerAddress
INTEGRATED DEVICE TECHNOLOGY INC6024 SILVER CREEK VALLEY ROAD SAN JOSE CA 95138

International Classification(s)

  • [Classification Symbol]
  • [Patents Count]

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Ghai, Ajay K San Jose, US 5 30

Cited Art Landscape

Load Citation

Patent Citation Ranking

Forward Cite Landscape

Load Citation