Methods for Semiconductor Processor Design and Verification

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United States of America Patent

APP PUB NO 20140025362A1
SERIAL NO

13938562

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Abstract

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The invention provides in some aspects methods for semiconductor processor design and verification that include the steps of applying to each of a first simulator and a second simulator commonly-defined tests, comparing results of such execution as between the simulators, and generating an output indicative thereof. The first simulator simulates operation of the processor in accord with an architectural definition thereof, and the second simulator simulates operation of the processor in accord with a hardware definition thereof. The tests are defined in accord with one of those definitions, e.g., the hardware definition.

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Patent Owner(s)

Patent OwnerAddress
PANEVE LLC357 MCCASLIN BLVD SUITE 200 LOUISVILLE CO 80027

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Frank, Steven J Boulder, US 73 4169

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