POWER SEMICONDUCTOR DEVICE AND FABRICATION METHOD THEREOF

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United States of America Patent

APP PUB NO 20140015040A1
SERIAL NO

13589199

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Abstract

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A power semiconductor device includes a substrate, a semiconductor layer grown on the substrate, a plurality of alternately arranged first conductivity type doping trenches and second conductivity type doping trenches in the semiconductor substrate, a first diffusion region of the first conductivity type around each of the first conductivity type doping trenches, and a second diffusion region of the second conductivity type around each of the second conductivity type doping trenches, wherein distance between an edge of the first conductivity type doping trench and PN junction between the first and second diffusion regions substantially equals to a distance between an edge of the second conductivity type doping trench and the PN junction.

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Patent Owner(s)

Patent OwnerAddress
ANPEC ELECTRONICS CORPORATIONHSINCHU

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Chang, Chia-Hao Hsinchu City, TW 393 1191
Lin, Yung-Fa Hsinchu City, TW 79 629
Shih, Yi-Chun Nantou County, TW 173 404

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