HIERARCHICAL POWER MAP FOR LOW POWER DESIGN
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
N/A
Issued Date -
Jan 9, 2014
app pub date -
Dec 18, 2012
filing date -
Jun 24, 2010
priority date (Note) -
Abandoned
status (Latency Note)
Importance
Abstract
Power information associated with an IC design is displayed graphically and hierarchically using a power map, thereby providing an intuitive way for describing the power distribution among various power domains of the IC and parent-child relationships within the power domains. Each power domain is associated with a power control for controlling the power domain. The status of the power control for each power domain is displayed on the power map. The power map may include a token to set and display current operating mode of the IC design to enable the IC design to be debugged under different operating modes.
First Claim
Other Claims data not available
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
- 29 Citation Count
- G06F Class
- 63.45 % this patent is cited more than
- 11 Age