PREFETCHING OF NEXT PHYSICALLY SEQUENTIAL CACHE LINE AFTER CACHE LINE THAT INCLUDES LOADED PAGE TABLE ENTRY
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United States of America Patent
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N/A
Issued Date -
Jan 9, 2014
app pub date -
Apr 29, 2013
filing date -
Mar 30, 2009
priority date (Note) -
Abandoned
status (Latency Note)
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Abstract
A microprocessor includes a translation lookaside buffer, a request to load a page table entry into the microprocessor generated in response to a miss of a virtual address in the translation lookaside buffer, and a prefetch unit. The prefetch unit receives a physical address of a first cache line that includes the requested page table entry and responsively generates a request to prefetch into the microprocessor a second cache line that is the next physically sequential cache line to the first cache line.
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