SEMICONDUCTOR MEMORY STRUCTURE AND CONTROL METHOD THEREOF
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United States of America Patent
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Issued Date -
Jan 2, 2014
app pub date -
Aug 15, 2011
filing date -
May 10, 2011
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Abandoned
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Abstract
The present invention belongs to the technical field of non-volatile semiconductor memories, and relates to a semiconductor memory structure and a control method thereof. The semiconductor memory structure in the present invention comprises a memory unit for storing information and a tunneling field-effect transistor connected with the memory unit. The tunneling field-effect transistor is used for controlling the semiconductor memory's operations such as erasing, writing, and reading. A plurality of semiconductor memory structures compose a semiconductor memory array. The control method provided by the present invention comprises steps of resetting, setting, and reading. A vertical gate-controlled diode structure in a tunneling field-effect transistor is capable of providing a large current for writing a resistive random access memory and a phase change memory and improving the density of the memory array and therefore is very suitable for use in manufacturing of semiconductor memory chips; besides, the control method and the control circuit thereof are simple.
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