NON-SELF-ALIGNED NON-VOLATILE MEMORY STRUCTURE
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United States of America Patent
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N/A
Issued Date -
Dec 19, 2013
app pub date -
Jun 15, 2012
filing date -
Jun 15, 2012
priority date (Note) -
Abandoned
status (Latency Note)
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Abstract
A non-self-aligned non-volatile memory structure, comprising: a semiconductor substrate; a left floating gate memory cell and a right floating gate memory cell; a control gate; and a gate insulation layer disposed among said two floating gate memory cells and said control gate. Drains of said two floating gate memory cells are connected to different voltage levels. Said control gate is over said two floating gate memory cells, to cover said floating gates of said two floating gate memory cells, so as to control said two floating gates simultaneously. Said non-self-aligned non-volatile memory structure mentioned above does not require line-to-line alignment of gates, thus reducing significantly the complexity of manufacturing process, and number of layers of photo masks required, in achieving production cost reduction.

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- 15 United States
- 10 France
- 8 Japan
- 7 China
- 5 Korea
- 2 Other
Patent Owner(s)
Patent Owner | Address | |
---|---|---|
YIELD MICROELECTRONICS CORP | 7F-2 NO 28 TAI YUEN ST CHU-PEI CITY HSIN-CHU COUNTY |
International Classification(s)
Inventor(s)
Inventor Name | Address | # of filed Patents | Total Citations |
---|---|---|---|
FAN, YA-TING | HSINCHU COUNTY, TW | 12 | 22 |
HUANG, WEN CHIEN | HSINCHU COUNTY, TW | 6 | 26 |
LIN, HSIN CHANG | HSINCHU COUNTY, TW | 15 | 102 |
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