IN-SITU BARRIER OXIDATION TECHNIQUES AND CONFIGURATIONS
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United States of America Patent
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Issued Date -
Dec 5, 2013
app pub date -
May 30, 2012
filing date -
May 30, 2012
priority date (Note) -
Abandoned
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Abstract
Embodiments of the present disclosure describe apparatuses, methods, and systems of an integrated circuit (IC) device. The IC device may include a buffer layer disposed on a substrate, the buffer layer including gallium (Ga) and nitrogen (N), a barrier layer disposed on the buffer layer, the barrier layer including aluminum (Al) and nitrogen (N), wherein the barrier layer includes an oxidized portion of the barrier layer, a gate dielectric disposed on the oxidized portion of the barrier layer, and a gate electrode disposed on the gate dielectric, wherein the oxidized portion of the barrier layer is disposed in a gate region between the gate electrode and the buffer layer.
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