MONOLITHICALLY INTEGRATED SIC MOSFET AND SCHOTTKY BARRIER DIODE
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United States of America Patent
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Issued Date -
Nov 28, 2013
app pub date -
May 24, 2013
filing date -
May 24, 2012
priority date (Note) -
Abandoned
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Abstract
A SIC VDMOS transistor is integrated with a SiC SBD, in a seamless way, without any increase of the device area. The SiC SBD is integrated in the active area of the VDMOS by splitting the P-Wells, such that the lightly doped drift region extents all the way to the surface of semiconductor, and by trenching through the source of the VDMOS and partially through the P-Wells to reach the peak of the P-type doping in the P-Well regions. The source of the VDMOS is contacted from the top surface and from the vertical sidewalls of the trenched source and the forward voltage of the Schottky Barrier diode is tailored by using two different metals for the ohmic contact on the source and for the SBD.
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