CONNECTOR
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United States of America Patent
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Issued Date -
Nov 14, 2013
app pub date -
Sep 4, 2012
filing date -
May 11, 2012
priority date (Note) -
Abandoned
status (Latency Note)
Importance
Abstract
A memory connector with an increased pin interval is disclosed including a main body and a plurality of pins. The body includes a bottom, and the pins are disposed on the bottom along a longitudinal direction in an interlaced way. A recess is formed on the bottom of the main body corresponding to each of the pins at one end of the pin. The arrangement of the pins therein solves the problem of insufficient space for wiring lines of the main board, which is occurred frequently when the pins are fabricated by an SMD process, without increasing any manufacturing cost in particular.
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