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United States of America Patent
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Issued Date -
Nov 14, 2013
app pub date -
May 10, 2013
filing date -
May 11, 2012
priority date (Note) -
Abandoned
status (Latency Note)
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Abstract
A circuit comprising a first input transistor having a drain, a source and a gate. A first diode connected transistor having a drain, a source and a gate, wherein the gate of the first diode connected transistor is coupled to the drain of the first diode connected transistor, and the drain of the first input transistor is coupled to the drain of the first diode connected transistor. A first load transistor having a drain, a source and a gate, wherein the drain of the first load transistor is coupled to the drain of the first diode connected transistor and the source of the first load transistor is coupled to the source of the first diode connected transistor.
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